SPI¶

4G LTE Module SPI Port Mapping¶

SPI Port 0¶

SPI Pin	EC600U	EC200U*	N58	N716	L610	EG915U
MISO	Pin 1	Pin 40	Pin 84	Pin 6	Pin 40	Pin 26
MOSI	Pin 4	Pin 37	Pin 87	Pin 7	Pin 37	Pin 25
CLK	Pin 3	Pin 38	Pin 86	Pin 5	Pin 38	Pin 64
CS	Pin 2	Pin 39	Pin 85	Pin 4	Pin 39	Pin 88

Note

SPI Port 0 is not available on EC200U with integrated GNSS

SPI Port 1¶

SPI Pin	EC600U	EC200U	N58	N716	L610	EG915U
MISO	Pin 60	Pin 25	Pin 78	Pin 102	Pin 25	Pin 7
MOSI	Pin 59	Pin 24	Pin 80	Pin 101	Pin 24	Pin 6
CLK	Pin 61	Pin 27	Pin 50	Pin 99	Pin 27	Pin 4
CS	Pin 58	Pin 26	Pin 90	Pin 100	Pin 26	Pin 5

GSM/NB-IoT Module SPI Port Mapping¶

GSM (MT2503, MT6261) and NB-IoT (MT2625) chipset supported modules expose only one I2C port. Following is the pin mapping for SPI Port 0.

SPI Pin	MC20U Pin S20U Pin	M56 Pin	MC60 Pin MC20 Pin	M66 Pin	BC20 Pin	SIM868 Pin
MISO	Pin 61	Pin 15	Pin 61	Pin 31	Pin 61	Pin 41
MOSI	Pin 60	Pin 16	Pin 60	Pin 33	Pin 60	Pin 42
CLK	Pin 62	Pin 18	Pin 62	Pin 32	Pin 62	Pin 7
CS	Pin 59	Pin 4	Pin 59	Pin 30	Pin 59	Pin 5

API Reference¶

Header File¶

Source: include/hw/spi.h

#include <hw/spi.h>

Functions¶

int spi_hw_init(int port, int hardware_cs, int clock, int mode, int cs_pol)¶

Initialize SPI Hardware and setup pinmux

Parameters

port – [in] SPI Port Number (spiport_e)
hardware_cs – [in] Set it TRUE, if application hardware chip select is used and hardware controls chip select status, FALSE otherwise
clock – [in] SPI Clock speed in Hz
mode – [in] SPI Mode (spi_mode_e)
cs_pol – [in] Chip select Polarity (spi_cspol_e)

Returns

0 on success, negative on error

int spi_hw_setclock(int port, unsigned long clock_hz)¶

Set/Change SPI clock speed. Default speed is 10MHz

Parameters

port – [in] SPI Port Number (spiport_e)
clock_hz – [in] Clock speed in Hz

Returns

0 on success, negative value on error

int spi_hw_setmode(int port, int mode)¶

Configure SPI clock mode

Parameters

port – [in] SPI Port Number (spiport_e)
mode – [in] SPI mode, see spi_mode_e

Returns

0 on success, negative value on error

int spi_hw_setbitorder(int port, int bit_order)¶

Configure SPI bit shift order

Parameters

port – [in] SPI Port Number (spiport_e)
bit_order – [in] SPI bit shit order, see spi_bitorder_e

Returns

0 on success, negative value on error

int spi_hw_setcsmode(int port, int cs_pol)¶

Configure chip-select line. Only needed when hardware_cs is used

Parameters

port – [in] SPI Port Number (spiport_e)
cs_pol – [in] Chip select polarity, see spi_cspol_e

Returns

0 on success, negative value on error

int spi_hw_transfer(int port, const void *wrbuf, void *rdbuf, int length)¶

Perform SPI transaction

Parameters

port – [in] SPI Port Number (spiport_e)
wrbuf – [in] Pointer to data buffer to write, can be NULL if only read operation to be performed
rdbuf – [out] Pointer to buffer to store data, can be NULL if only write operation to be performed
length – [in] Length of data to read/write

Returns

Length of data read/write on success, negative on error

int spi_hw_free(int port)¶

Release SPI hardware

Parameters: port – [in] SPI Port Number (spiport_e)
Returns: 0 on success, negative on error

int spi_hw_cscontrol(int port, int level)¶

Control SPI HW CS line.

This function can be used to control chip select line of SPI controller (which is not mapped as GPIO) when HW SPI is used.

Note

This function is only available on platforms with RDA8910 SoC.

Parameters

port – [in] SPI Port Number (spiport_e)
level – [in] chip select level (0 - low, 1 - high)

Returns

0 on success, negative on error

Enumerations¶

enum spi_mode_e¶

SPI Modes to configure clock polarity and clock phase.

For more information see https://en.wikipedia.org/wiki/Serial_Peripheral_Interface#Clock_polarity_and_phase

Values:

enumerator SPI_MODE0¶: Mode 0 (default): CPOL = 0, CPHA = 0

enumerator SPI_MODE1¶: Mode 1: CPOL = 0, CPHA = 1

enumerator SPI_MODE2¶: Mode 2: CPOL = 1, CPHA = 0

enumerator SPI_MODE3¶: Mode 3: CPOL = 1, CPHA = 1

enum spi_bitorder_e¶

SPI byte order to configure shit in/out order of data byte.

Values:

enumerator SPI_MSB_FIRST¶: MSB sent first (default)

enumerator SPI_LSB_FIRST¶: LSB sent first

enum spi_cspol_e¶

Chip select polarity flags

Values:

enumerator SPI_CSPOL_LOW¶: Chip select is active low (default)

enumerator SPI_CSPOL_HIGH¶: Chip select is active high

Header File¶

Source: include/plat/def_spi.h

#include <plat/def_spi.h>

Enumerations¶

enum spiport_e¶

SPI port list

Values:

enumerator SPI_PORT_0¶: SPI Port 0.

enumerator SPI_PORT_1¶: SPI Port 1.

Note

Aavailable on 4G modems only